Memory devices of a dynamic random access (DRAM) memory comprise a plurality of memory cells. Typically, the memory cells comprise a storage element, for example, a storage capacitor, as well as an access transistor. The access transistor is connected with a storage element so as to control writing or reading data into or from the storage element, respectively. For example, in a typical DRAM memory cell, the storage element is implemented as a storage capacitor and the data is represented by an electrical charge stored in the capacitor. In the commonly known DRAM cells, charges leak from the storage capacitor. As a result, the data stored in the specific memory cell gets lost. In this respect, the retention time refers to the time during which data may be recognizably stored in a memory cell. In order to store data for a time which is longer than the retention time, it is necessary to perform a refresh operation.
In commonly known memory devices, data may be refreshed by reading the stored data and by re-writing the data into the memory cell.
Among the various attempts to improve DRAM devices, efforts are made in order to improve the retention time characteristics of memory cells. Moreover alternative methods of refreshing the data stored in the memory cell are searched. In particular, it is attempted to reduce the power consumption required for a refreshing operation is reduced.